1. general description the 74lvc1g74-q100 is a single positive edge tr iggered d-type flip-flop. it has individual data (d) inputs, clock (cp) inputs, set (s d) and reset (r d) inputs, and complementary qandq outputs. this device is fully specified for pa rtial power-down ap plications using i off . the i off circuitry disables the output, preventing damaging backflow current through the device when it is powered down. the set and reset are asynchronous active lo w inputs and operate independently of the clock input. information on the data input is transferred to the q output on the low-to-high transition of the clock pulse. the d inputs must be stable one set-up time prior to the low-to-high clock transition for predictable operation. schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times. this product has been qualified to the automotive electronics council (aec) standard q100 (grade 1) and is suitable for use in automotive applications. 2. features and benefits ? automotive product qualif ication in accordance with aec-q100 (grade 1) ? specified from ? 40 ? c to +85 ? c and from ? 40 ? c to +125 ? c ? wide supply voltage range from 1.65 v to 5.5 v ? 5 v tolerant inputs for interfacing with 5 v logic ? high noise immunity ? complies with jedec standard: ? jesd8-7 (1.65 v to 1.95 v) ? jesd8-5 (2.3 v to 2.7 v) ? jesd8-b/jesd36 (2.7 v to 3.6 v) ? esd protection: ? mil-std-883, method 3015 exceeds 2000 v ? hbm jesd22-a114f exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v (c = 200 pf, r = 0 ? ) ? ? 24 ma output drive (v cc =3.0v) ? cmos low power consumption ? latch-up performance exceeds 250 ma ? direct interface with ttl levels ? inputs accept voltages up to 5 v ? multiple package options 74lvc1g74-q100 single d-type flip-flop with set and reset; positive edge trigger rev. 2 ? 14 may 2013 product data sheet
74lvc1g74_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 2 ? 14 may 2013 2 of 18 nxp semiconductors 74lvc1g74-q100 single d-type flip-flop with set and reset; positive edge trigger 3. ordering information 4. marking [1] the pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. functional diagram table 1. ordering information type number package temperature range name description version 74lvc1g74dp-q100 ? 40 ? c to +125 ? c tssop8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm sot505-2 74LVC1G74DC-Q100 ? 40 ? c to +125 ? c vssop8 plastic very thin shri nk small outline package; 8 leads; body width 2.3 mm sot765-1 74lvc1g74gd-q100 ? 40 ? c to +125 ? c xson8 plastic extremely thin small outline package; no leads; 8 terminals; body 3 ? 2 ? 0.5 mm sot996-2 table 2. marking codes type number marking code [1] 74lvc1g74dp-q100 v74 74LVC1G74DC-Q100 v74 74lvc1g74gd-q100 v74 fig 1. logic symbol fig 2. iec logic symbol 001aah757 rd ff sd q q q q sd cp cp d d rd 001aah758 c1 s 1d r
74lvc1g74_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 2 ? 14 may 2013 3 of 18 nxp semiconductors 74lvc1g74-q100 single d-type flip-flop with set and reset; positive edge trigger 6. pinning information 6.1 pinning 6.2 pin description fig 3. logic diagram mna421 sd cp rd d c c q c c c c c c q c c fig 4. pin configuration sot505-2 and so t765-1 fig 5. pin configuration sot996-2 / 9 & |